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Silicon Labs /SiM3_NRND /SIM3U166_B /EMIF_0 /IFRT_1

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Interpret as IFRT_1

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https://regviz.com/r/Silicon Labs/SiM3_NRND/SIM3C167_B/EMIF_0/IFRT_1#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RASET0RAHOLD0RDHOLD0RDWAIT

Description

Interface Read Timing

Fields

RASET

Interface Read Address Setup Delay .
RAHOLD

Interface Read Address Hold Delay.
RDHOLD

Interface Read Data Hold Delay.
RDWAIT

Interface Read Data Wait Delay.

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data